MOS transistors as a basic constituent circuit for large scale integrated circuits (LSI) have been highly integrated in accordance with a scaling rule. However, it is considered that the gate insulation film using silicon dioxide (SiO2) is limited to a film thickness of 2.0 nm or less at the cost of increasing the consumption power and lowering reliability of the insulation film due to increase a direct tunnel leakage current. Further, since a diffusion barrier to impurities is weakened in such thin SiO2, it brings about leakage of impurities from a gate electrode. Further, a stringent production control is necessary for mass production of thin SiO2 films at a good uniformity.
In view of the above, for attaining further refinement and higher operation speed of the device simultaneously and breaking through the limit for the scaling, development for “High Dielectric Constant (high-K) Material” capable of obtaining a field effect performance equal to or superior to SiO2 even when it is formed with a thickness larger than SiO2 has been conducted actively. Potential candidate materials include IV group oxides such as zirconia (ZrO2), hafnia (HfO2), III group oxides such as alumina (Al2O3) and yttria (Y2O3) and silicates as solid solutions of such metal oxides and SiO2. The group IV oxides and group III oxides are materials utilized as the gate insulation film in the early stage of Si semiconductors. However, after the technique for forming the gate insulation film with SiO2 has been established, SiO2 has been used exclusively in view of its excellent characteristics. For example, a field effect transistor (FET) using ZrO2 for the gate insulation film is described in IEDM' 99 Tech. Digest, pp. 145, 1999. A field effect transistor using HfO2 for the gate insulation film is described in 2000 Symposium on VLSI Technology Digest of Technical Papers, and a field effect transistor using alumina for the gate insulation film is described in IEDM' 00 Tech. Digest pp. 145, 2000. A method for manufacturing a metal silicate is described in JP-A-135774/1999.
Existing FET forming processes include, after forming the gate insulation film, a step of depositing a gate comprising, for example, polycrystalline silicon, a step of injecting impurities to the polycrystalline silicon gate, a step of fabricating the gate, a step of injecting impurities to a source-drain region, and a heating step of activating the impurities. Particularly, for the heating step (activating the impurities), a temperature of 900° C. or higher is desirable for controlling to a predetermined impurity profile. Accordingly, it is necessary for the gate insulation film comprising the high dielectric material to maintain interface characteristics at high quality even by the FET forming process including the heating step.
However, in a case of forming FET, for example, by applying Al2O3 to a gate insulation film, the following problems exist as described in IEDM' 00 Tech. Digest, pp 145. Since negative fixed charges are present in the insulation film, a flat band voltage of an N channel type MISFET shifts by 0.3 V or more toward a positive voltage and a threshold voltage of FET also changes. Further, since the mobility of electrons is small which is about ¼ compared with a universal curve of an SiO2 film (general curve giving effective field effect dependence of mobility), the source—drain current upon operating FET can not be increased as expected. One of the reasons that the mobility of electrons is small is attributable to scattering of electrons in the channel because of the presence of negative fixed charges in the insulation film. Accordingly, for applying Al2O3 to the gate insulation film, it is necessary to remove the negative fixed charges in the insulation film.
The equivalent SiO2 thickness (EOT) of a high dielectric gate insulation film is defined as below. When the thickness of an SiO2 gate insulation film obtained by fixing a refractive index to 1.46 is tox measured by an ellipsometer using a light at frequency of 784 nm, the SiO2 equivalent film thickness (EOT) of the high dielectric gate insulation film having an identical electrical capacitance with that of an MOS capacitor formed by using the SiO2 gate insulation film.
This invention intends to develop a high dielectric insulation film at high quality with less SiO2 equivalent film thickness, less leakage current when compared by an identical equivalent film thickness, stable also to thermal load in the FET forming process and excellent in the boundary characteristics.